Current mirror arrangement

ABSTRACT

A current mirror arrangement including an input current path comprising a main current path of a first current mirror transistor and a transistor connected thereto in a cascode configuration and referred to as first cascode transistor, an output current path comprising a main current path of a second current mirror transistor and a transistor connected thereto in a cascode configuration and referred to as second cascode transistor, the current mirror transistors being interconnected in a current mirror configuration and their control terminals being connected to a first circuit point, the connected control terminals of the cascode transistors being interconnected and being connected to an input terminal in the input current path of the current mirror arrangement, the input terminal being constituted by a terminal of the main current path of the first cascode transistor, and an output terminal being constituted by a terminal of the main current path of the second cascode transistor, and a current splitting circuit for deriving a part of a current from the first circuit point in the output terminal, the current splitting circuit is adapted to split up the current from the first circuit point directly to the output terminal and a reference point.

The invention relates to a current mirror arrangement comprising

an input current path comprising a main current path of a first currentmirror transistor and a transistor connected thereto in a cascodeconfiguration and referred to as first cascode transistor,

an output current path comprising a main current path of a secondcurrent mirror transistor and a transistor connected thereto in acascode configuration and referred to as second cascode transistor,

the current mirror transistors being interconnected in a current mirrorconfiguration and their control terminals being connected to a firstcircuit point,

the connected control terminals of the cascode transistors beinginterconnected and being connected to an input terminal in the inputcurrent path of the current mirror arrangement,

the input terminal being constituted by a terminal of the main currentpath of the first cascode transistor remote from the first currentmirror transistor, and an output terminal being constituted by aterminal of the main current path of the second cascode transistorremote from the second current mirror transistor,

a dimensioning of the current mirror and cascode transistors for acurrent in the input current path, which corresponds at leastsubstantially to the n-fold value of the current in the output currentpath,

and a current splitting circuit for deriving a part of a current fromthe first circuit point in the output terminal.

Current mirror arrangements are used in transistor circuitry techniquesfor diverting, multiplying or changing reference currents by a definedfactor. The deviation of the output current from the input current orfrom the desired multiple of the input current is dependent on differentinfluences, of which the compensation of the control currents of thetransistors or—in the case of bipolar transistors—the compensation ofthe Early voltages are very important. These influences can becounteracted preferably by a symmetrical configuration of the currentmirror arrangements, but this is at the expense of the number ofcomponents to be used and the minimally required power supply voltage.

A current mirror comprising two bipolar transistors whose emitters areinterconnected at one end and whose bases are interconnected at theother end is known from the article “Halbleiter-Schaltungstechnik” by U.Tietze and Ch. Schenk, 8^(th) edition, Springer-Verlag, 1986, pp. 62 to64. Moreover, the base and the collector of the input transistor areinterconnected. In this simple current mirror arrangement, the currentmirror ratio is distorted by the base currents of the two transistorsflowing via the input.

When such a current mirror arrangement is augmented with a furthertransistor whose emitter is connected to the coupled bases of thecurrent mirror transistors, whose base is connected to the input and thecollector is connected to a reference potential, the error in thecurrent mirror ratio with respect to the base current of the additionaltransistor is reduced. Particularly for current mirrors consisting ofPNP transistors having comparably small current gains, this error maystill be too large for given applications.

A current mirror known as Wilson current mirror, in which a furthertransistor is arranged in a cascode configuration in addition to thecurrent mirror transistor in the output branch is also known from saidarticle “Halbleiter-Schaltungstechnik”. The connected bases of thecurrent mirror transistors are connected to this cascode branch and thecontrol terminal of the cascode transistor is connected to the inputbranch. A considerable base current compensation for a mirror ratio of 1can be achieved with this circuit. However, there are distortions due tothe Early voltages. It is true that, due to the addition of a furthertransistor arranged as a diode in the input branch of the Wilson currentmirror in such a way that this transistor is cascode arranged withrespect to the current mirror transistor in the input branch, theinfluence of Early voltages on the current mirror transistors of theWilson current mirror can be suppressed. Nevertheless, an exactcompensation of the base currents and hence a flawless current ratio isobtained only for a value of at least substantially 1 of this currentratio.

A current mirror with an input branch and at least two output brancheswith PNP mirror transistors is known from U.S. Pat. No. 5,627,732. Eachof these current mirror transistors is arranged in a cascodeconfiguration with a cascode transistor. In FIG. 4 of U.S. Pat. No.5,627,732, the base currents of the current mirror transistors arecollected and applied to a common emitter of a current distributiontransistor denoted by the reference sign T7. This current distributiontransistor is constituted as a multicollector transistor. The collectedbase currents of the current mirror transistors are equally distributedto the output terminals of the output branches of the current mirror.Due to such a distribution, however, no exact compensation of the basecurrents and hence the current mirror error is obtained. An error isleft in the current mirror ratio between the output current paths andthe input current path. To obviate this drawback, U.S. Pat. No.5,627,732 proposes various circuits with reference to FIGS. 5, 6 and 8in this document. Particularly FIG. 8 shows an arrangement which shouldensure both an exact current mirror ratio and an independence ofvariations of the input current of the current mirror and shouldsimultaneously generate current mirror ratios different from 1. However,this is at the expense of a proportionally large number of components.

It is an object of the invention to construct a current mirrorarrangement of the type described in the opening paragraph in such a waythat it has an exact current mirror ratio of more than 1 between aninput current path and an output current path, and can be built with asmall number of components and for a low power supply voltage.

According to the invention, in a current mirror arrangement of the typedescribed in the opening paragraph, this object is solved in that

n is larger than 1,

the current splitting circuit is adapted to split up the current fromthe first circuit point directly to the output terminal and a referencepoint in a ratio of m:1, in which the relation m=1/(n−1) is at leastsubstantially satisfied for m.

In the current mirror arrangement according to the invention, thecurrent splitting circuit is connected to the control terminals of thecurrent mirror transistors and the cascode transistors in such a waythat symmetrical potential ratios are adjusted in the input current pathand in the output current path during operation. In a construction ofthe transistors used in a bipolar circuit technique, the effects due toEarly voltages are thereby reduced; errors caused thereby in the currentmirror ratio do not occur. For the selected range of values of thefactor n, for which the current in the input current path is larger thanthe current in the output current path, an error current caused by thecurrents in the control terminals of the cascode transistors iscompensated by adding a predetermined part of the sum of the currentsfrom the control terminals of the current mirror transistors to thecurrent in the output terminal. The indicated relation between m and napplies exactly only to transistors having very large current gains.While taking finite values for the current gain B into account, thefollowing equation is obtained for the relation between the factors mand n:

m=(B+1)/(B·(n−1)−1).

With the current mirror arrangement according to the invention, thedesired current mirror ratio is precisely maintained without anydeviations due to currents in the control terminals of the transistors.The current mirror arrangement according to the invention requires avery small number of components. The current mirror arrangementaccording to the invention can be operated at very small power supplyvoltages. Due to a small variation of the factor m, i.e. the factorwhich is essential for the split-up of the current in the currentsplitting circuit, influences on the current mirror ratio between theinput current path and the output current path may also be compensated,which influences are due to different potentials at the input terminaland the output terminal.

In a variant of the current mirror arrangement according to theinvention, in which the current in the output current path is to bechosen to be larger than the current in the input current path, and inwhich the factor n determining this current mirror ratio is thus smallerthan 1, error currents can be compensated by the currents from thecontrol terminals of the cascode transistors in such a way that a partof the currents, determined in a comparable way, from the controlterminals of the current mirror transistors is applied to the inputterminal.

In a further advantageous embodiment, the current mirror arrangementaccording to the invention is formed in such a way that the currentsplitting circuit comprises a transistor arrangement having a first anda second current path, both of which are connected at one end to thefirst circuit point, the first current path is connected at the otherend to the reference point and the second current path is connected atthe other end to the output terminal, while the current paths aredimensioned for a ratio of the currents conveyed thereby of m:1 betweenthe second and the first current path.

This current splitting circuit is formed in a very simple way. It may befurther improved in such a way that the first current path of thecurrent splitting circuit is constituted by the main current path of afirst splitting transistor, and the second current path of the currentsplitting circuit is constituted by the main current path of a secondsplitting transistor, and that the first and the second splittingtransistor are interconnected in a current mirror configuration andtheir control terminals are connected to the input terminal. A variantof this embodiment is characterized in that the first and the secondcurrent path in a transistor are formed with two main current paths anda common control terminal, and the control terminal is connected to theinput terminal.

Current mirror arrangements are preferably formed with bipolartransistors. In a corresponding further embodiment, the transistors inthe current mirror arrangement according to the invention areaccordingly formed as bipolar transistors. The invention is veryadvantageous in a current mirror arrangement with PNP transistorsbecause smaller current gains B and thus larger base currents occurfrequently, whose exact compensation is very important.

In the current mirror arrangement according to the invention, thefactors m and n described hereinbefore generally define the currentmirror ratio or the current splitting ratio to be adjusted in thecurrent splitting circuit. In a construction with bipolar transistors,these current ratios can be easily realized by ratios of the emitter andcollector areas of the corresponding transistors. An advantageousfurther embodiment of the invention is therefore characterized in thatthe emitter and collector areas of the first current mirror transistorand the first cascode transistor correspond to the n-fold value of theemitter and collector areas of the second current mirror transistor andthe second cascode transistor, and in that the emitter and collectorareas arranged in the first and the second current path of the currentsplitting circuit are chosen in a mutual ratio of 1:m. Although thesignificance of the factors m and n as area factors is selected on thebasis of this relation, their significance for the teachings of theinvention is not limited to the definition of areas.

These and other aspects of the invention are apparent from and will beelucidated with reference to the embodiments described hereinafter.

In the drawing:

The sole FIGURE shows a current mirror arrangement having an inputcurrent path between a power supply terminal 1 and an input terminal 2and an output current path between the power supply terminal 1 and anoutput terminal 3. In the input current path, the main current paths ofa first current mirror transistor 4 and a first cascode transistor 5 areinterconnected in a cascode configuration, i.e. they are arranged inseries. In the output current path, the main current paths of a secondcurrent mirror transistor 6 and a second cascode transistor 7 arearranged in a corresponding manner in series in a cascode configuration.In the embodiment, the transistors 4, 5, 6, 7 are formed as bipolartransistors of the PNP type. In a corresponding manner, their maincurrent paths are constituted by the collector-emitter paths of thesetransistors between the collector and the emitter. The base of thetransistor constitutes an associated control terminal.

In the embodiment, the current mirror transistors 4, 6 areinterconnected in a current mirror configuration. To this end, theemitters of the current mirror transistors 4 and 6 are connected to thepower supply terminal 1. The bases of the current mirror transistors 4,6 are connected to a first circuit point 8. The collectors of thecurrent mirror transistors 4 and 6 are connected to the emitters of theassociated cascode transistors 5 and 7, respectively. The collector ofthe first cascode transistor 5 is connected to the input terminal 2, thecollector of the second cascode transistor 7 is connected to the outputterminal 3. The bases of the cascode transistors 5, 7 are interconnectedand also connected to the input terminal 2. To adjust a desired currentmirror ratio between the current in the input terminal 2 and the currentin the output terminal 3 during operation, the emitter areas of thefirst current mirror transistor 4 and the first cascode transistor 5 arechosen to be the n-fold value of the emitter areas of the second currentmirror transistor 6 of the second cascode transistor 7. The factor n isfixed to be larger than 1. The embodiment shown in the Figure furthercomprises a current splitting circuit consisting of a first splittingtransistor 9 and a second splitting transistor 10. Due to this currentsplitting circuit, the sum of the currents in the bases of the currentmirror transistors 4, 6 is drained in operation via the first circuitpoint 8 and split up at a reference point 11, in this example ground,and the output terminal 3. To this end, the current splitting circuit,together with the splitting transistors 9, 10, forms a first currentpath leading from the first circuit point 8 via the collector-emitterpath of the first splitting transistor 9 to the reference point 11, anda second current path leading from the first circuit point 8 via thecollector-emitter path of the second splitting transistor 10 to theoutput terminal 3. These current paths are dimensioned for a ratio ofthe currents conveyed in these paths of m:1 between the second and thefirst current path. In the embodiment shown, the splitting transistors9, 10 are also formed as bipolar transistors of the PNP type. They haveemitter areas which are fixed in a ratio of m:1. Due to this factor m, apart of the current derived from the first circuit point 8 is applied tothe reference point 11 and the rest of this current, corresponding tothe m-fold value of the current at the reference point 11, is applied tothe output terminal 3. To this end, the splitting transistors 9, 10 areinterconnected in a current mirror configuration, i.e. their emittersare connected at one end to the first circuit point 8 and their basesare connected at the other end to the input terminal 2. The relationM=1/(n−1) approximately holds for the factors m and n as well as for thecurrent gain B of the transistors, or, more precisely, the equation

m=(B+1)/(B·(n−1)−1)

while taking the current gain B into account and assuming that there areequal current gains for all transistors in the circuit arrangement. Insuch a dimensioning of the current mirror arrangement, the current inthe input terminal 2 exactly corresponds to the n-fold value of thecurrent in the output terminal 3.

In a modification of the embodiment shown, the splitting transistors 9,10 may be combined to one transistor with two main current paths whichthen constitute the two current paths of the current splitting circuit.Such a transistor is formed with an emitter and two collectors as wellas with a common control terminal (base). The control terminal is againconnected to the input terminal 2. The collector of this transistorconstituting one end point of the first current path is connected to thereference point 11 and the second collector is connected to the outputterminal 3. The collector areas of the first and second current paths inthis transistor are dimensioned in a ratio of 1:m, where theabove-mentioned relations hold for m.

What is claimed is:
 1. A current mirror arrangement comprising an inputcurrent path comprising a main current path of a first current mirrortransistor and a transistor connected thereto in a cascode configurationand referred to as first cascode transistor, an output current pathcomprising a main current path of a second current mirror transistor anda transistor connected thereto in a cascode configuration and referredto as second cascode transistor, the current mirror transistors beinginterconnected in a current mirror configuration and their controlterminals being connected to a first circuit point, the connectedcontrol terminals of the cascode transistors being interconnected andbeing connected to an input terminal in the input current path of thecurrent mirror arrangement, the input terminal being constituted by aterminal of the main current path of the first cascode transistor remotefrom the first current mirror transistor, and an output terminal beingconstituted by a terminal of the main current path of the second cascodetransistor remote from the second current mirror transistor, adimensioning of the current mirror and cascode transistors for a currentin the input current path, which corresponds at least substantially tothe n-fold value of the current in the output current path, and acurrent splitting circuit for deriving a part of a current from thefirst circuit point in the output terminal, characterized in that n islarger than 1, the current splitting circuit is adapted to split up thecurrent from the first circuit point directly to the output terminal anda reference point in a ratio of m:1, in which the relation m=1/(n−1) isat least substantially satisfied for m.
 2. A current mirror arrangementas claimed in claim 1, characterized in that the current splittingcircuit comprises a transistor arrangement having a first and a secondcurrent path, both of which are connected at one end to the firstcircuit point, the first current path is connected at the other end tothe reference point and the second current path is connected at theother end to the output terminal, while the current paths aredimensioned for a ratio of the currents conveyed thereby of m:1 betweenthe second and the first current path.
 3. A current mirror arrangementas claimed in claim 2, characterized in that the first current path ofthe current splitting circuit is constituted by the main current path ofa first splitting transistor, and the second current path of the currentsplitting circuit is constituted by the main current path of a secondsplitting transistor, and in that the first and the second splittingtransistor are interconnected in a current mirror configuration andtheir control terminals are connected to the input terminal.
 4. Acurrent mirror arrangement as claimed in claim 2, characterized in thatthe first and the second current path in a transistor are formed withtwo main current paths and a common control terminal, and the controlterminal is connected to the input terminal.
 5. A current mirrorarrangement as claimed in claim 3, characterized in that the transistorsare bipolar transistors.
 6. A current mirror arrangement as claimed inclaim 5, characterized in that the emitter and collector areas of thefirst current mirror transistor and the first cascode transistorcorrespond to the n-fold value of the emitter and collector areas of thesecond current mirror transistor and the second cascode transistor, andin that the emitter and collector areas arranged in the first and thesecond current path of the current splitting circuit are chosen in amutual ratio of 1:m.